What you will learn
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This course discussed how a C code can be automatically translated into register transfer level (RTL) design using high-level synthesis (HLS). HLS is an active domain of research in recent times in the domain of electronic Design Automation (EDA) of VLSI. This course will help the student to (i) understand the overall HLS flow, (ii) how a C-code will be converted to its equivalent hardware, (iii) how to write c-code for efficient hardware generation and (iv) how the common software compiler optimization can help to improve the circuit performance. Also, advanced topics like HLS for FPGA targets, HLS for Security, optimizations at RTL level and verification challenges of HLS will be covered. This course will help the student to take up research in the domain of HLS. Also, this course will help the student to become proficient for EDA industries.
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Meet Your Instructor
About Instructor
VTU is one of the largest Technological Universities in India with 24 years of Tradition of excellence in Engineering & Technical Education, Research and Innovations. It came into existence in the year 1998 to cater the needs of Indian industries for trained technical manpower with practical experience and sound theoretical knowledge.
Free
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Course Duration32 h 14 m 17 s
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Course LevelAdvanced
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Student Enrolled3
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LanguageEnglish
This Course Includes
- 32 h 14 m 17 s Video Lectures
- 2 Quizzes
- 0 Assignments
- 0 Downloadable Resources
- Full Lifetime Access
- Certificate of Completion